MATLAB EMBEDDED IDE LINK 4 - FOR USE WITH ANALOG DEVICES VISUALDSP PLUSPLUS Manual de usuario descargar pdf (Pagina 55)

AD73460

Low Power, Six-Channel ADC with DSP

54 DSP Selection Guide

http://www.analog.com

Features Benefits

Analog Front

End Section

DAG 1 DAG 2

Data Address

Generators

Program

Sequencer

Program Memory Address

Data Memory Address

Program Memory Data

Data Memory Data

ALU

MAC

Arithmetic Units

Shifter

ADSP-2100 Base

Architecture

Serial Ports

Timer

SPORT 0

SPORT 1

Serial Ports

SPORT 2

REF

ADC1

External

Addr Bus

External

Data Bus

Byte DMA

Controller

Full Memory

Mode

Powerdown

Control

Programmable

I/O and

Flags

Memory

16K PM

(Optional

8K)

16K DM

(Optional

8K)

ADC2 ADC3 ADC4 ADC5 ADC6

Applications

AD73460BB-40

AD73460BB-80

6

6

8/8K

16/16K

119 PBGA

119 PBGA

Model

AFE

CHNS

Pin/Pkg

Prog

Data

Memory

AFE PERFORMANCE

• Six 16-Bit A/D converters

• Programmable input sample rate

• 72 dB ADC SNR

• 64 kS/s maximum sample rate

• –80 dB crosstalk

• Low group delay (25 µs typ per ADC

channel)

• Programmable input gain

• Single supply operation

• On-chip reference

DSP PERFORMANCE

• 19 ns instruction cycle time @ 3.3 Volts,

52 MIPS sustained performance

• Single-cycle instruction execution

• Single-cycle context switch

• 3-Bus architecture allows dual operand

fetches in every instruction cycle

• Multifunction instructions

• Power-down mode featuring low CMOS

standby

• Power dissipation with 400 cycle

recovery from power-down condition

• Low power dissipation in idle mode

• Extensive analog front ends include A/Ds,

D/As, PGAs, reference and input conditioning

circuitry

• Reduced design risk – all the interface design

work is done

• Programmable, high-speed DSP based on

ADSP-218x Family

• General purpose I/O

• Industrial metering

• Active control of sound and vibration

• Speech processing

• Data communications

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