MATLAB EMBEDDED IDE LINK 4 - FOR USE WITH ANALOG DEVICES VISUALDSP PLUSPLUS Manual de usuario Pagina 53

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52 DSP Selection Guide
AD73411
Low Power Analog Front End with DSP
Features
Benefits
Analog Front
End Section
DAG 1 DAG 2
Data Address
Generators
Program
Sequencer
Program Memory Address
Data Memory Address
Program Memory Data
Data Memory Data
ALU
MAC
Arithmetic Units
Shifter
ADSP-218X DSP
Serial Ports
Timer
SPORT 0
SPORT 1
Serial Ports
SPORT 2
REF
ADC DAC
External
Addr Bus
External
Data Bus
Byte DMA
Controller
Full Memory
Mode
Powerdown
Control
Programmable
I/O and
Flags
Memory
16K PM
(Optional
Program)
16K DM
(Optional
Data)
Applications
AD73411-40
AD73411-80
1
1
8/8K
16/16K
119 PBGA
119 PBGA
Model
AFE
CHNS Pin/Pkg
Prog
Data
Memory
AFE PERFORMANCE
• 16-Bit A/D converter
• 16-Bit D/A converter
• Programmable input/output sample rates
• 76 dB ADC SNR
• 77 dB DAC SNR
• 64 kS/s maximum sample rate
• –90 dB crosstalk
• Low group delay (25 µs typ per ADC
channel, 50 µs typ per DAC channel)
• Programmable input/output gain
• On-chip reference
DSP PERFORMANCE
• 19 ns instruction cycle time @ 3.3 Volts,
52 MIPS performance
• Single-cycle instruction execution
• Single-cycle context switch
• 3-Bus architecture allows dual operand
fetches in every instruction cycle
• Multifunction instructions
• Power-down mode featuring low CMOS
standby
• Power dissipation with 400 cycle recovery
from power-down condition
• Low power dissipation in idle mode
• Extensive analog front ends include A/Ds,
D/A, PGAs, reference and input conditioning
circuitry
• Reduced design risk – all the interface design
work is done
• Programmable, high-speed DSP based on
ADSP-218x Family
• General purpose analog I/O
• Speech processing
• Cordless and personal communications
• Telephony
• Wireless local loop
Active control of sound and vibration
• Data communications
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